SH7059 Datasheet, PDF (526/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Controller Area Network-II (HCAN-II)
17.4 HCAN Control Registers
The following sections describe the HCAN control registers. Table 17.4 shows the address map.
Note: These registers can only be accessed in word size (16 bits).
Table 17.4 HCAN Control Registers
Channel
0
1
Address
H'FFFFD000
H'FFFFD002
H'FFFFD004
H'FFFFD006
H'FFFFD008
H'FFFFD00A
H'FFFFD00C
H'FFFFD800
H'FFFFD802
H'FFFFD804
H'FFFFD806
H'FFFFD808
H'FFFFD80A
H'FFFFD80C
Register Name
Master control register_0
General status register_0
HCAN-II_bit configuration register 1_0
HCAN-II_bit configuration register 0_0
Interrupt register_0
Interrupt mask register_0
Transmit error counter_0/
Receive error counter_0
Master control register_1
General status register_1
HCAN-II_bit configuration register 1_1
HCAN-II_bit configuration register 0_1
Interrupt register_1
Interrupt mask register_1
Transmit error counter_1/
Receive error counter_1
Abbreviation
MCR_0
GSR_0
HCAN-II_BCR1_0
HCAN-II_BCR0_0
IRR_0
IMR_0
TEC_0/REC_0
MCR_1
GSR_1
HCAN-II_BCR1_1
HCAN-II_BCR0_1
IRR_1
IMR_1
TEC_1/REC_1
Access Size (Bits)
16
16
16
16
16
16
16
16
16
16
16
16
16
16
17.4.1 Register Descriptions
Legends for register descriptions are as follows:
Initial Value
—
R/W
R
R/WC0
R/WC1
W
—/W
: Register value after a reset
: Undefined value
: Readable/writable bit. The write value can be read.
: Read-only bit. The write value should always be 0.
: Readable/writable bit. If 0 is written to this bit, the bit is initialized; if 1 is written to this bit, it is ignored.
: Readable/writable bit. If 1 is written to this bit, the bit is initialized; if 0 is written to this bit, it is ignored.
: Write-only bit. Reading prohibited. If reserved, the write value should always be 0.
: Write-only bit. The read value is undefined.
17.4.2 Master Control Register_n (MCR_n) (n = 0, 1)
The master control register (MCR) is a 16-bit readable/writable register that controls the HCAN.
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TST7 TST6 TST5 TST4 TST3 TST2 TST1 TST0 MCR7
MCR5 MCR4
MCR2 MCR1 MCR0
Initial Value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W ⎯ R/W R/W ⎯ R/W R/W R/W
Rev.3.00 Mar. 12, 2008 Page 436 of 948
REJ09B0177-0300