SH7059 Datasheet, PDF (444/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

15. Serial Communication Interface (SCI)
15.1.2 Block Diagram
Figure 15.1 shows a block diagram of the SCI.
Module data bus
Internal
data bus
RxD
TxD
SCK
RDR
TDR
SSR
BRR
SCR
RSR
TSR
SMR
SDCR
Baud rate
generator
Transmit/
receive control
Parity
generation
Clock
Parity check
External clock
Legend:
RSR: Receive shift register
RDR: Receive data register
TSR: Transmit shift register
TDR: Transmit data register
SCI
SMR: Serial mode register
SCR: Serial control register
SSR: Serial status register
BRR: Bit rate register
SDCR: Serial direction control register
Figure 15.1 SCI Block Diagram
Pφ
Pφ/4
Pφ/16
Pφ/64
TEI
TXI
RXI
ERI
Rev.3.00 Mar. 12, 2008 Page 354 of 948
REJ09B0177-0300