SH7059 Datasheet, PDF (839/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
25.4.4 RAM Emulation Register (RAMER)
When the realtime programming of the user MAT is emulated, RAMER sets the area of the user MAT which is
overlapped with a part of the on-chip RAM. RAMER is initialized to H'0000 at a power-on reset or in hardware standby
mode, or in software standby mode. The RAMER setting must be executed in user mode or in user program mode.
For the division method of the user-MAT area, see table 25.7. In order to operate the emulation function certainly, the
target MAT of the RAM emulation must not be accessed immediately after RAMER is programmed. If it is accessed, the
normal access is not guaranteed.
Bit :
15
14
13
12
11
10
9
8
Initial value : 0
0
0
0
0
0
0
0
R/W :
R
R
R
R
R
R
R
R
Bit :
7
6
5
4
3
2
1
0
RAMS
RAM0
Initial value : 0
0
0
0
0
0
0
0
R/W :
R
R
R
R
R/W
R
R
R/W
• Bits 15 to 4—Reserved: These bits are always read as 0. The write value should always be 0.
• Bit 3—RAM Select (RAMS): Sets whether the user MAT is emulated or not. When RAMS = 1, all blocks of the user
MAT are in the programming/erasing protection state.
Bit 3
RAMS
Description
0
Emulation is not selected
(Initial value)
Programming/erasing protection of all user-MAT blocks is invalid
1
Emulation is selected
Programming/erasing protection of all user-MAT blocks is valid
• Bits 2 to 0—User MAT Area Select: These bits are used with bit 3 to select the user-MAT area to be overlapped with
the on-chip RAM. (See table 25.7.)
Table 25.7 Overlapping of RAM Area and User MAT Area
RAM Area
H'FFFE8000 to H'FFFEBFFF
H'00000000 to H'00003FFF
H'00004000 to H'00007FFF
Legend: * Don't care.
Block Name
RAM area (16 Kbytes)
EB0 – EB3 (16 Kbytes)
EB4 – EB7 (16 Kbytes)
RAMS
0
1
1
RAM0
*
0
1
Rev.3.00 Mar. 12, 2008 Page 749 of 948
REJ09B0177-0300