SH7059 Datasheet, PDF (603/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

18. A/D Converter
18.5 Interrupt Sources and DMA Transfer Requests
The A/D converter can generate an A/D conversion end interrupt request (ADI0, ADI1, or ADI2) upon completion of A/D
conversions. The ADI interrupt can be enabled by setting the ADIE bit in the A/D control/status register (ADCSR) to 1, or
disabled by clearing the ADIE bit to 0.
The DMAC can be activated by an ADI interrupt. In this case an interrupt request is not sent to the CPU.
When the DMAC is activated by an ADI interrupt, the ADF bit in ADCSR is automatically cleared when data is
transferred by the DMAC.
See section 10.4.2, Example of DMA Transfer between A/D Converter and On-Chip Memory (Address Reload On), for an
example of this operation.
18.6 Usage Notes
The following points should be noted when using the A/D converter.
1. Analog input voltage range
The voltage applied to analog input pins during A/D conversion should be in the range AV_SS ≤ AN_n ≤ AV_ref.
2. Relation between, AV_SS, AV_CC and V_SS, V_CC
When using the A/D converter, set AV_CC = 5.0 V ±0.5 V, and AV_SS = V_SS. When the A/D converter is not used, set
AV_SS = V_SS, and the setting range is AV_SS ≤ AV_CC ≤ 5.5 V.
3. AV_ref input range
Set AV_ref = 4.5 V to AV_CC when the A/D converter is used, and AV_CC - 1.0 V ≤ AV_ref ≤ AV_CC and AV_SS ≤ AV_ref when not
used.
If conditions above are not met, the reliability of the device may be adversely affected.
4. Notes on board design
In board design, digital circuitry and analog circuitry should be as mutually isolated as possible, and layout in which
digital circuit signal lines and analog circuit signal lines cross or are in close proximity should be avoided as far as
possible. Failure to do so may result in incorrect operation of the analog circuitry due to inductance, adversely
affecting A/D conversion values.
Also, digital circuitry must be isolated from the analog input signals (ANn), analog reference voltage (AV_ref), and
analog power supply (AV_CC) by the analog ground (AV_SS). AV_SS should be connected at one point to a stable digital
ground (V_SS) on the board.
5. Notes on noise countermeasures
A protection circuit connected to prevent damage due to an abnormal voltage such as an excessive surge at the analog
input pins (ANn) and analog reference voltage (AVref) should be connected between AVCC and AVSS as shown in
figure 18.9.
Also, the bypass capacitors connected to AVCC and AVref and the filter capacitor connected to ANn must be
connected to AVSS. If a filter capacitor is connected as shown in figure 18.9, the input currents at the analog input pins
(ANn) are averaged, and so an error may arise. Careful consideration is therefore required when deciding the circuit
constants.
Rev.3.00 Mar. 12, 2008 Page 513 of 948
REJ09B0177-0300