SH7059 Datasheet, PDF (475/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Error handling
No
ORER = 1?
Yes
Overrun error handling
15. Serial Communication Interface (SCI)
No
FER = 1?
Yes
Break?
Yes
No
Framing error handling
Clear RE bit in SCR to 0 6
Clear ORER and FER
bits in SSR to 0
End
Note: Do not write to SMR, SCR, BRR, or
SDCR between the start and the end of
a receive operation. However, this does
not apply to operation 6.
Figure 15.14 Sample Flowchart for Receiving Multiprocessor Serial Data (2)
Figure 15.15 shows examples of SCI receive operation using a multiprocessor format.
Rev.3.00 Mar. 12, 2008 Page 385 of 948
REJ09B0177-0300