SH7059 Datasheet, PDF (274/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
• Bit 5—Counter Start 7B (STR7B): Starts and stops free-running counter 7B (TCNT7B).
Bit 5: STR7B
0
1
Description
TCNT7B is halted
TCNT7B counts
• Bit 4—Counter Start 7A (STR7A): Starts and stops free-running counter 7A (TCNT7A).
Bit 4: STR7A
0
1
Description
TCNT7A is halted
TCNT7A counts
• Bit 3—Counter Start 6D (STR6D): Starts and stops free-running counter 6D (TCNT6D).
Bit 3: STR6D
0
1
Description
TCNT6D is halted
TCNT6D counts
• Bit 2—Counter Start 6C (STR6C): Starts and stops free-running counter 6C (TCNT6C).
Bit 2: STR6C
0
1
Description
TCNT6C is halted
TCNT6C counts
• Bit 1—Counter Start 6B (STR6B): Starts and stops free-running counter 6B (TCNT6B).
Bit 1: STR6B
0
1
Description
TCNT6B is halted
TCNT6B counts
• Bit 0—Counter Start 6A (STR6A): Starts and stops free-running counter 6A (TCNT6A).
Bit 0: STR6A
0
1
Description
TCNT6A is halted
TCNT6A counts
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
Timer Start Register 3 (TSTR3)
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
STR11
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W
TSTR3 is an 8-bit readable/writable register that starts and stops the free-running counter (TCNT11) in channel 11.
TSTR3 is initialized to H'00 by a power-on reset, and in hardware standby mode and software standby mode.
Rev.3.00 Mar. 12, 2008 Page 184 of 948
REJ09B0177-0300