SH7059 Datasheet, PDF (759/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. ROM (SH7058S)
24.5.2 User Program Mode
The user MAT can be programmed/erased in user program mode. (The user boot MAT cannot be programmed/erased.)
Programming/erasing is executed by downloading the program in the microcomputer.
The overview flow is shown in figure 24.9.
High voltage is applied to internal flash memory during the programming/erasing processing. Therefore, transition to reset
or hardware standby mode must not be executed. Doing so may cause damage or destroy flash memory. If reset is
executed accidentally, the reset signal must be released after the reset input period, which is longer than the normal 100
μs.
For details on the programming procedure, see the description in 24.5.2 (2) Programming Procedure in User Program
Mode. For details on the erasing procedure, see the description in 24.5.2 (3) Erasing Procedure in User Program Mode.
For the overview of a processing that repeats erasing and programming by downloading the programming program and the
erasing program in separate on-chip ROM areas using FTDAR, see the description in 24.5.2 (4) Erasing and Programming
Procedure in User Program Mode.
Programming/erasing
start
When programming,
program data is prepared
FWE=1 ?
No
Yes
Programming/erasing
procedure program is
transferred to the on-chip
RAM and executed
Programming/erasing
end
1. RAM emulation mode must be canceled
in advance. Download cannot be executed
in emulation mode.
2. When the program data is made by means
of emulation, the download destination must be
changed by FTDAR. With the initial setting of
FTDAR (H'00), the download area is
overlapped with the emulation area.
3. Inputting high level to the FWE pin sets the
FWE bit to 1.
4. Programming/erasing is executed only in
the on-chip RAM. However, if the program data
is in a consecutive area and can be accessed
by the MOV.B instruction of the CPU like
SRAM/ROM, the program data can be in an
external space.
5. After programming/erasing is finished, low level
must be input to the FWE pin for protection.
Figure 24.9 Programming/Erasing Overview Flow
(1) On-Chip RAM Address Map when Programming/Erasing is Executed
Parts of the procedure program that are made by the user, like download request, programming/erasing procedure, and
judgement of the result, must be executed in the on-chip RAM. All of the on-chip program that is to be downloaded is
in on-chip RAM. Note that on-chip RAM must be controlled so that these parts do not overlap.
Figure 24.10 shows the program area to be downloaded.
Rev.3.00 Mar. 12, 2008 Page 669 of 948
REJ09B0177-0300