UPD78F1502AGK-GAK-AX Datasheet, PDF (99/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 3 CPU ARCHITECTURE
PMC register is described below.
• Processor mode control register (PMC)
This register selects the flash memory space for mirroring to area from F0000H to FFFFFH.
PMC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 3-4. Format of Configuration of Processor Mode Control Register (PMC)
Address: FFFFEH After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
<0>
PMC
0
0
0
0
0
0
0
MAA
MAA
0
1
Selection of flash memory space for mirroring to area from F0000H to FFFFFH
00000H to 0FFFFH is mirrored to F0000H to FFFFFH
10000H to 1FFFFH is mirrored to F0000H to FFFFFH
Cautions 1. Set PMC only once during the initial settings prior to operating the DMA controller. Rewriting
PMC other than during the initial settings is prohibited.
2. After setting PMC, wait for at least one instruction and access the mirror area.
3. When the μPD78F1500A, 78F1503A, 78F1506A, 78F1510A, 78F1513A, and 78F1516A (flash
memory size: 64 KB) are used, be sure to set bit 0 (MAA) of this register to 0.
3.1.3 Internal data memory space
78K0R/Lx3 microcontrollers products incorporate the following RAMs.
<R>
<R>
Table 3-4. Internal RAM Capacity
Part Number
μPD78F1500A, 78F1503A, 78F1506A, 78F1510A, 78F1513A, 78F1516A
μPD78F1501A, 78F1504A, 78F1507A
μPD78F1502A, 78F1505A, 78F1508A, 78F1512A, 78F1515A, 78F1518A
Internal RAM
4096 × 8 bits (FEF00H to FFEFFH)
6144 × 8 bits (FE700H to FFEFFH)
7168 × 8 bits (FE300H to FFEFFH)
The internal RAM can be used as a data area and a program area where instructions are written and executed. Four
general-purpose register banks consisting of eight 8-bit registers per bank are assigned to the 32-byte area of FFEE0H to
FFEFFH of the internal RAM area. However, instructions cannot be executed by using general-purpose registers.
The internal RAM is used as a stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
instructions or as a stack area.
2. While using the self-programming function, the area of FFE20H to FFEFFH cannot be used as a
stack memory.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011