UPD78F1502AGK-GAK-AX Datasheet, PDF (398/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
9.2 Configuration of Clock Output/Buzzer Output Controller
The clock output/buzzer output controller includes the following hardware.
Table 9-1. Configuration of Clock Output/Buzzer Output Controller
Item
Control registers
Configuration
Clock output select registers 0, 1 (CKS0, CKS1)
Port mode register 3 (PM3)
Port register 3 (P3)
9.3 Registers Controlling Clock Output/Buzzer Output Controller
The following two registers are used to control the clock output/buzzer output controller.
• Clock output select registers 0, 1 (CKS0, CSK1)
• Port mode register 3 (PM3)
(1) Clock output select registers 0, 1 (CKS0, CKS1)
These registers set output enable/disable for clock output or for the buzzer frequency output pin
(PCLBUZ0/PCLBUZ1), and set the output clock.
Select the clock to be output from PCLBUZ0 by using CKS0.
Select the clock to be output from PCLBUZ1 by using CKS1.
CKS0 and CKS1 are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
R01UH0004EJ0501 Rev.5.01
382
Jun 20, 2011