UPD78F1502AGK-GAK-AX Datasheet, PDF (973/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
APPENDIX C LIST OF CAUTIONS
APPENDIX C LIST OF CAUTIONS
This appendix lists the cautions described in this document.
“Classification (hard/soft)” in the table is as follows.
Hard: Cautions for microcontroller internal/external hardware
Soft: Cautions for software such as register settings or programs
Function
Details of
Function
Cautions
(1/39)
Page
Outline
Pin
functions
On-chip debug
function
AVSS, VSS
The 78K0R/Lx3 microcontrollers have an on-chip debug function, which is provided p.3 _†
for development and evaluation. Do not use the on-chip debug function in products
designated for mass production, because the guaranteed number of rewritable times
of the flash memory may be exceeded when this function is used, and product
reliability therefore cannot be guaranteed. Renesas Electronics is not liable for
problems occurring when the on-chip debug function is used.
Make AVSS the same potential as VSS.
pp.4, 5 _†
7, 8, 10,11
REGC
Connect the REGC pin to VSS via a capacitor (0.47 to 1 μF).
pp.4, 5 _†
P00/CAPH,
7, 8, 10,11
To use P00/CAPH, P01/CAPL, and P02/VLC3 as a general-purpose port, set bit 5 p.43 _†
P01/CAPL,
(MDSET1) and bit 4 (MDSET0) of LCD mode register (LCDMD) to “0”, which is the
P02/VLC3
P10/SCK20/
same as their default status setting.
To use P10/SCK20/SCL20 and P11/SI20/RxD2/SDA20/INTP6 as a general-purpose p.45 _†
SCL20,
port, note the serial array unit 1 setting. For details, refer to Table 14-9 Relationship
P11/SI20/RxD2/ Between Register Settings and Pins (Channel 0 of unit 1: CSI20, UART2 Reception,
SDA20/INTP6 IIC20).
P12/TO02/SO20 To use P12/TO02/SO20/TxD2 as a general-purpose port, set bit 2 (TO02) of timer p.45 _†
/TxD2
output register 0 (TO0) and bit 2 (TOE02) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting. And as a general-purpose port,
note the serial array unit 1 setting. For details of serial array unit 1 setting, refer to
Table 14-9 Relationship Between Register Settings and Pins (Channel 0 of unit 1:
CSI20, UART2 Reception, IIC20).
P13/TO04/SO10 To use P13/TO04/SO10/TxD1 as a general-purpose port, set bit 4 (TO04) of timer p.45 _†
/TxD1
output register 0 (TO0) and bit 4 (TOE04) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting. And as a general-purpose port,
note the serial array unit 0 setting. For details of serial array unit 0 setting, refer to
Table 14-7 Relationship Between Register Settings and Pins (Channel 2 of unit 0:
CSI10, UART1 Transmission, IIC10).
P14/SI10/RxD1/ To use P14/SI10/RxD1/SDA10/INTP4 and P15/SCK10/SCL10/INTP7 as a general- p.45 _†
SDA10/INTP4, purpose port, note the serial array unit 0 setting. For details, refer to Table 14-7
P15/SCK10/
Relationship Between Register Settings and Pins (Channel 2 of unit 0: CSI10,
SCL10/INTP7 UART1 Transmission, IIC10).
P16/TO05/TI05/ To use P16/TO05/TI05/INTP10 as a general-purpose port, set bit 5 (TO05) of timer p.45 _†
INTP10
output register 0 (TO0) and bit 5 (TOE05) of timer output enable register 0 (TOE0) to
“0”, which is the same as their default status setting.
R01UH0004EJ0501 Rev.5.01
957
Jun 20, 2011