UPD78F1502AGK-GAK-AX Datasheet, PDF (351/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
Figure 6-66. Operation Procedure of One-Shot Pulse Output Function (1/2)
TAU
default
setting
Channel
default
setting
Software Operation
Sets the TAU0EN or TAU1EN bits of the PER0 register
to 1.
Sets the TPSm register.
Determines clock frequencies of CKm0 and CKm1.
Sets the TMRmn and TMRmp registers of two channels
to be used (determines operation mode of channels).
An output delay is set to the TDRmn register of the
master channel, and a pulse width is set to the TDRmp
register of the slave channel.
Sets slave channel.
The TOMmp bit of the TOMm register is set to 1
(combination operation mode).
Sets the TOLmp bit.
Sets the TOmp bit and determines default level of the
TOmp output.
Sets TOEmp to 1 and enables operation of TOmp.
Clears the port register and port mode register to 0.
Hardware Status
Power-off status
(Clock supply is stopped and writing to each register is
disabled.)
Power-on status. Each channel stops operating.
(Clock supply is started and writing to each register is
enabled.)
Channel stops operating.
(Clock is supplied and some power is consumed.)
The TOmn pin goes into Hi-Z output state.
The TOmn default setting level is output when the port
mode register is in output mode and the port register is 0.
TOmp does not change because channel stops operating.
The TOmp pin outputs the TOmp set level.
Remarks 1.
2.
3.
78K0R/LF3:
• m = 0, n = 0, 2, 6, p = n+1, TO00 to TO04, and TO07 pins
• Channel 6 of timer array unit 0 can output a one-shot pulse only when software trigger start is selected
and it is used as the master channel (because the TI06 pin is not provided).
78K0R/LG3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07 pins
78K0R/LH3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07 pins
• m = 1, n = 0, 2, p = n+1, TO10 to TO13 pins
R01UH0004EJ0501 Rev.5.01
335
Jun 20, 2011