UPD78F1502AGK-GAK-AX Datasheet, PDF (312/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
6.5 Channel Input Control
6.5.1 Edge detection circuit
(1) Edge detection basic operation timing
Edge detection circuit sampling is done in accordance with the operation clock (MCK).
Figure 6-36. Edge Detection Basic Operation Timing
fCLK
Operation clock (MCK)
Synchronized (noise filter)
internal TIpq signal
Rising edge detection
internal trigger
Falling edge detection
internal trigger
Remark pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: pq = 00 to 04, 07
78K0R/LG3: pq = 00 to 07
78K0R/LH3: pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
296
Jun 20, 2011