UPD78F1502AGK-GAK-AX Datasheet, PDF (392/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 8 WATCHDOG TIMER
8.3 Register Controlling Watchdog Timer
The watchdog timer is controlled by the watchdog timer enable register (WDTE).
(1) Watchdog timer enable register (WDTE)
Writing “ACH” to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH or 1AH^Note.
Figure 8-2. Format of Watchdog Timer Enable Register (WDTE)
Address: FFFABH After reset: 9AH/1AH^Note R/W
Symbol
7
6
5
4
3
2
1
0
WDTE
Note The WDTE reset value differs depending on the WDTON setting value of the option byte (000C0H). To
operate watchdog timer, set WDTON to 1.
WDTON Setting Value
0 (watchdog timer count operation disabled)
1 (watchdog timer count operation enabled)
WDTE Reset Value
1AH
9AH
Cautions 1. If a value other than “ACH” is written to WDTE, an internal reset signal is generated.
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset signal is
generated.
3. The value read from WDTE is 9AH/1AH (this differs from the written value (ACH)).
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011