UPD78F1502AGK-GAK-AX Datasheet, PDF (788/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
KR7
KR6
KR5
KR4
KR3
KR2
KR1
KR0
CHAPTER 20 KEY INTERRUPT FUNCTION
Figure 20-1. Block Diagram of Key Interrupt
INTKR
KRM7 KRM6 KRM5 KRM4 KRM3 KRM2 KRM1 KRM0
Key return mode register (KRM)
20.3 Register Controlling Key Interrupt
(1) Key return mode register (KRM)
This register controls the KRM0 to KRM7 bits using the KR0 to KR7 signals, respectively.
KRM can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 20-2. Format of Key Return Mode Register (KRM)
Address: FFF37H After reset: 00H R/W
Symbol
KRM
7
KRM7
6
KRM6
5
KRM5
4
KRM4
3
KRM3
2
KRM2
KRM1
0
KRM0
KRMn
0
1
Key interrupt mode control
Does not detect key interrupt signal
Detects key interrupt signal
Cautions 1. If any of the KRM0 to KRM7 bits used is set to 1, set bits 0 to 7 (PU70 to PU77) of the
corresponding pull-up resistor register 7 (PU7) to 1.
2. An interrupt will be generated if the target bit of the KRM register is set while a low level is being
input to the key interrupt input pin. To ignore this interrupt, set the KRM register after disabling
interrupt servicing by using the interrupt mask flag. Afterward, clear the interrupt request flag
and enable interrupt servicing after waiting for the key interrupt input low-level width (250 ns or
more).
3. The bits not used in the key interrupt mode can be used as normal ports.
Remark n = 0 to 7
R01UH0004EJ0501 Rev.5.01
772
Jun 20, 2011