UPD78F1502AGK-GAK-AX Datasheet, PDF (891/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 30 INSTRUCTION SET
Table 30-5. Operation List (16/17)
Instruction Mnemonic
Group
Operands
Bytes
Clocks
Note 1 Note 2
Operation
Flag
Z AC CY
Stack
PUSH
manipulate
PSW
2
1
− (SP − 1) ← PSW, (SP − 2) ← 00H,
SP ← SP − 2
rp
1
1
− (SP − 1) ← rpH, (SP − 2)← rpL,
SP ← SP − 2
POP
PSW
2
3
− PSW ← (SP + 1), SP ← SP + 2
RRR
rp
1
1
− rpL ← (SP), rpH ← (SP + 1), SP ← SP + 2
MOVW SP, #word
4
1
− SP ← word
SP, AX
2
1
− SP ← AX
AX, SP
2
1
− AX ← SP
HL, SP
3
1
− HL ← SP
BC, SP
3
1
− BC ← SP
DE, SP
3
1
− DE ← SP
ADDW SP, #byte
2
1
− SP ← SP + byte
SUBW SP, #byte
2
1
− SP ← SP − byte
Unconditio BR
nal branch
AX
$addr20
2
3
− PC ← CS, AX
2
3
− PC ← PC + 2 + jdisp8
$!addr20
3
3
− PC ← PC + 3 + jdisp16
!addr16
3
3
− PC ← 0000, addr16
Conditional BC
branch
BNC
BZ
BNZ
BH
!!addr20
$addr20
$addr20
$addr20
$addr20
$addr20
4
3
− PC ← addr20
2
2/4^{Note 3} − PC ← PC + 2 + jdisp8 if CY = 1
2
2/4^{Note 3} − PC ← PC + 2 + jdisp8 if CY = 0
2
2/4^{Note 3} − PC ← PC + 2 + jdisp8 if Z = 1
2
2/4^{Note 3} − PC ← PC + 2 + jdisp8 if Z = 0
3
2/4^{Note 3} − PC ← PC+3+jdisp8 if (Z ∨ CY)=0
BNH
$addr20
3
2/4^{Note 3} − PC ← PC+3+jdisp8 if (Z ∨ CY)=1
BT
saddr.bit, $addr20
4
3/5^{Note 3} − PC ← PC + 4 + jdisp8 if (saddr).bit = 1
sfr.bit, $addr20
4
3/5^{Note 3} − PC ← PC + 4 + jdisp8 if sfr.bit = 1
A.bit, $addr20
3
3/5^{Note 3} − PC ← PC + 3 + jdisp8 if A.bit = 1
PSW.bit, $addr20
4
3/5^{Note 3} − PC ← PC + 4 + jdisp8 if PSW.bit = 1
[HL].bit, $addr20
3
3/5^{Note 3} 6/7 PC ← PC + 3 + jdisp8 if (HL).bit = 1
ES:[HL].bit,
$addr20
4
4/6^{Note 3} 7/8 PC ← PC + 4 + jdisp8
if (ES, HL).bit = 1
Notes 1.
2.
3.
When the internal RAM area or SFR area is accessed, or for an instruction with no data access.
When the program memory area is accessed.
This indicates the number of clocks “when condition is not met/when condition is met”.
Remarks 1. One instruction clock cycle is one cycle of the CPU clock (fCPU) selected by the system clock control
register (CKC).
2. This number of clocks is for when the program is in the internal ROM (flash memory) area.
R01UH0004EJ0501 Rev.5.01
875
Jun 20, 2011