UPD78F1502AGK-GAK-AX Datasheet, PDF (726/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 17 MULTIPLIER/DIVIDER
(1) Multiplication/division data register A (MDAH, MDAL)
The MDAH and MDAL registers set the values that are used for a multiplication or division operation and store the
operation result. They set the multiplier and multiplicand data in the multiplication mode, and set the dividend data
in the division mode. Furthermore, the operation result (quotient) is stored in the MDAH and MDAL registers in the
division mode.
MDAH and MDAL can be set by a 16-bit manipulation instruction.
Reset signal generation clears these registers to 0000H.
Figure 17-2. Format of Multiplication/Division Data Register A (MDAH, MDAL)
Address: FFFF0H, FFFF1H, FFFF2H, FFFF3H After reset: 0000H, 0000H R/W
Symbol
FFFF3H
FFFF2H
MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH MDAH
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Symbol
FFFF1H
FFFF0H
MDAL
MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL MDAL
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Cautions 1. Do not rewrite the MDAH and MDAL values during division operation processing (while the
multiplication/division control register (MDUC) is 81H). The operation will be executed in this
case, but the operation result will be an undefined value.
2. The MDAH and MDAL values read during division operation processing (while MDUC is 81H)
will not be guaranteed.
The following table shows the functions of MDAH and MDAL during operation execution.
DIVMODE
0
1
Table 17-2. Functions of MDAH and MDAL During Operation Execution
Operation Mode
Multiplication mode
Division mode
Setting
MDAH: Multiplier
MDAL: Multiplicand
MDAH: Divisor (higher 16 bits)
MDAL: Dividend (lower 16 bits)
Operation Result
−
MDAH: Division result (quotient)
Higher 16 bits
MDAL: Division result (quotient)
Lower 16 bits
Remark DIVMODE: Bit 7 of the multiplication/division control register (MDUC)
R01UH0004EJ0501 Rev.5.01
710
Jun 20, 2011