UPD78F1502AGK-GAK-AX Datasheet, PDF (234/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
(6) 20 MHz internal high-speed oscillation control register (DSCCTL)
This register controls the 20 MHz internal high-speed oscillation clock (DSC) function.
It can be used to select whether to use the 20 MHz internal high-speed oscillation clock (fIH20) as a peripheral
hardware clock that supports 20 MHz.
DSCCTL can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 5-7. Format of 20 MHz Internal High-Speed Oscillation Control Register (DSCCTL)
Address: F00F6H After reset: 00H R/W^Note
Symbol
7
6
5
DSCCTL
0
0
0
4
<3>
<2>
1
<0>
0
DSCS
SELDSC
0
DSCON
DSCS
0
1
Not supplied
Supplied
20 MHz internal high-speed oscillation supply status flag
SELDSC
0
1
Selection of 20 MHz internal high-speed oscillation for CPU/peripheral hardware clock (fCLK)
Does not select 20 MHz internal high-speed oscillation (clock selected by CKC register is
supplied to fCLK)
Selects 20 MHz internal high-speed oscillation (20 MHz internal high-speed oscillation is
supplied to fCLK)
DSCON
0
1
20 MHz internal high-speed oscillation clock (fIH20) operation enable/disable
Disables operation.
Enables operation.
Note Bit 3 is read-only.
Cautions 1. 20 MHz internal oscillation can only be used if VDD ≥ 2.7 V.
2. Set SELDSC when 100 μ s have elapsed after having set DSCON with VDD ≥ 2.7 V.
3. The internal high-speed oscillator must be operated (HIOSTOP = 0) when DSCON = 1.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011