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UPD78F1502AGK-GAK-AX Datasheet, PDF (1027/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
APPENDIX D REVISION HISTORY
Edition
4th Edition
Description
Addition of example of calculation of LCD frame frequency to (c) and (d) of Figure
16-13. Common Signal Waveforms (2/2)
Change of Caution of Figure 16-31. Examples of LCD Drive Power Connections
(External Resistance Division Method)
Change the capacitance value of external capacitors to 0.47 μF±30% in 16.8.2
Internal voltage boosting method and 16.8.3 Capacitor split method
Addition of Note to Figure 18-4. Format of DMA Mode Control Register n
(DMCn) (1/2)
Change of description of Figure 18-7. Example of Setting for CSI Consecutive
Transmission
Addition of 18.5.2 CSI master reception and 18.5.3 CSI transmission/reception
Change of 18.5.6 Holding DMA transfer pending by DWAITn and addition of
Caution
Change of 18.5.7 Forced termination by software
Change of 18.6 Cautions on Using DMA Controller
Change value of maskable interrupts of 78K0R/LF3
Change of Figure 26-1. Format of User Option Byte (000C0H/010C0H) (1/2)
Change of 26.4 Setting of Option Byte
Addition of Figure 27-3. Example of Wiring Adapter for Flash Memory Writing
(μPD78F1508A)
Addition of 27.9 Creating ROM Code to Place Order for Previously Written
Product
Change of Examples 2 in 29.3 BCD Correction Circuit Operation
Change of Table 30-5. Operation List
Deletion of (TARGET)
Change of analog output voltage, output current, high, and output current, low in
Absolute Maximum Ratings (TA = 25°C)
Change of Internal Oscillator Characteristics
Addition of Recommended oscillator circuit constants
Change of output voltage, low (VOL2), supply current, and operating current of DC
Characteristics
Change of Caution of (1) Basic operation (3/6) in AC Characteristics
Change of (b) During communication at same potential (CSI mode) (master
mode, SCKp... internal clock output) of (2) Serial interface: Serial array unit
(2/18) and addition of Note 1
Change of (c) During communication at same potential (CSI mode) (slave mode,
SCKp... external clock input) of (2) Serial interface: Serial array unit (3/18)
Change of (d) During communication at same potential (simplified I2C mode) of
(2) Serial interface: Serial array unit (5/18)
Change of (f) Communication at different potential (2.5 V, 3 V) (CSI mode)
(master mode, SCKp... internal clock output) (1/2) of (2) Serial interface: Serial
array unit (11/18) and addition of Note 1
(13/14)
Chapter
CHAPTER 16 LCD
CONTROLLER/
DRIVER
CHAPTER 18 DMA
CONTROLLER
CHAPTER 19
INTERRUPT
FUNCTIONS
CHAPTER 26 OPTION
BYTE
CHAPTER 27 FLASH
MEMORY
CHAPTER 29 BCD
CORRECTION
CIRCUIT
CHAPTER 30
INSTRUCTION SET
CHAPTER 31
ELECTRICAL
SPECIFICATIONS
R01UH0004EJ0501 Rev.5.01
Jun 20, 2011
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