UPD78F1502AGK-GAK-AX Datasheet, PDF (944/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 31 ELECTRICAL SPECIFICATIONS
LCD Characteristics (4/4)
(3) Capacitor split method
• 1/3 bias method (TA = −40 to +85°C, 2.2 V ≤ VDD = EVDD ≤ 5.5 V, VSS = EVSS = 0 V)
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
VLC0 voltage
VLC0
C1 to C4 = 0.47 μ F^{Note 3}
VDD
V
VLC1 voltage
VLC1
C1 to C4 = 0.47 μ F^{Note 3}
2/3 VLC0 2/3 VLC0 2/3 VLC0
V
−0.1
+0.1
VLC2 voltage
VLC2
C1 to C4 = 0.47 μ F^{Note 3}
1/3 VLC0 1/3 VLC0 1/3 VLC0
V
−0.1
+0.1
Capacitor split wait time^{Note 1}
tVAWAIT
100
ms
LCD output resistor ^{Note 2}
(Common)
LCD output resistor ^{Note 2}
(Segment)
RODC
IO = ±5 μA
ROCS
IO = ±1 μA
40
kΩ
200
kΩ
Notes 1. This is the wait time from when voltage bucking is started (VLCON = 1) until display is enabled (LCDON = 1).
2. The output resistor is a resistor connected between one of the VLC0, VLC1, VLC2 and VSS pins, and either of the
SEG and COM pins.
3. This is a capacitor that is connected between voltage pins used to drive the LCD.
C1: A capacitor connected between CAPH and CAPL
C2: A capacitor connected between VLC0 and GND
C3: A capacitor connected between VLC1 and GND
C4: A capacitor connected between VLC2 and GND
C1 = C2 = C3 = C4 = 0.47 pF±30 %
R01UH0004EJ0501 Rev.5.01
928
Jun 20, 2011