UPD78F1502AGK-GAK-AX Datasheet, PDF (823/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 24 LOW-VOLTAGE DETECTOR
Note 4. When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use software to wait for
the following periods of time, between when LVION is set to 1 and when the voltage is confirmed with
LVIF.
• Operation stabilization time (10 μs (MAX.))
• Minimum pulse width (200 μs (MIN.))
The LVIF value for these periods may be set/cleared regardless of the voltage level, and can therefore not
be used. Also, the LVIIF interrupt request flag may be set to 1 in these periods.
Cautions 1. To stop LVI, be sure to clear (0) LVION by using a 1-bit memory manipulation instruction.
2. Input voltage from external input pin (EXLVI) must be EXLVI < VDD.
3. When LVI is used in interrupt mode (LVIMD = 0) and LVISEL is set to 0, an interrupt request
signal (INTLVI) that disables LVI operation (clears LVION) when the supply voltage (VDD) is less
than or equal to the detection voltage (VLVI) (if LVISEL = 1, input voltage of external input pin
(EXLVI) is less than or equal to the detection voltage (VEXLVI)) is generated and LVIIF may be set
to 1.
R01UH0004EJ0501 Rev.5.01
807
Jun 20, 2011