UPD78F1502AGK-GAK-AX Datasheet, PDF (759/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 19 INTERRUPT FUNCTIONS
Table 19-1. Interrupt Source List (3/3)
Interrupt
Type
Internal/
External
Basic
Configuration
Type
Note 1
Default
Priority^{Note 2}
Name
Interrupt Source
Trigger
Maskable Internal
(A)
Software
−
(D)
Reset
−
−
41
INTTM10 End of timer channel 10 count or
capture
42
INTTM11 End of timer channel 11 count or
capture
43
INTTM12 End of timer channel 12 count or
capture
44
INTTM13 End of timer channel 13 count or
capture
45
INTMD End of multiply/divide operation
−
BRK
Execution of BRK instruction
−
RESET RESET pin input
POC
Power-on-clear
LVI
Low-voltage detection^{Note 3}
WDT
Overflow of watchdog timer
TRAP
Execution of illegal instruction^{Note 4}
Vector LF LG LH
Table 3 3 3
Address
00056H √ √ √
00058H √ √ √
0005AH √ √ √
0005CH √ √ √
0005EH √ √ √
0007EH √ √ √
00000H √ √ √
√√√
√√√
√√√
√√√
Notes 1.
2.
3.
4.
The default priority determines the sequence of interrupts if two or more maskable interrupts occur
simultaneously. Zero indicates the highest priority and 45 indicates the lowest priority.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 19-1.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
When the instruction code in FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.
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Jun 20, 2011