UPD78F1502AGK-GAK-AX Datasheet, PDF (307/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
6.4.3 Cautions on Channel Output Operation
(1) Changing values set in registers TOp,TOEp,TOLp, and TOMp during timer operation
Since the timer operations (operations of TCRpq and TDRpq) are independent of the TOpq output circuit and
changing the values set in TOp, TOEp, TOLp, and TOMp does not affect the timer operation, the values can be
changed during timer operation. To output an expected waveform from the TOpq pin by timer operation, however,
set TOp, TOEp, TOLp, and TOMp to the values stated in the register setting example of each operation.
When the values set in TOEp, TOLp, and TOMp (except for TOp) are changed close to the timer interrupt
(INTTMpq), the waveform output to the TOpq pin may be different depending on whether the values are changed
immediately before or immediately after the timer interrupt (INTTMpq) signal generation timing.
(2) Default level of TOpq pin and output level after timer operation start
The following figure shows the TOpq pin output level transition when writing has been done in the state of TOEpq =
0 before port output is enabled and TOEpq = 1 is set after changing the default level.
(a) When operation starts with TOMpq = 0 setting (toggle output)
The setting of TOLpq is invalid when TOMpq = 0. When the timer operation starts after setting the default level,
the toggle signal is generated and the output level of TOpq pin is reversed.
Figure 6-28. TOpq Pin Output Status at Toggle Output (TOMpq = 0)
TOEpq
Default level, TOLpq setting
TOpq = 0, TOLpq = 0 Hi-Z
TOpq = 1, TOLpq = 0 Hi-Z
TOpq = 0, TOLpq = 1
(Same output waveform as TOLpq = 0)
TOpq = 1, TOLpq = 1
(Same output waveform as TOLpq = 0)
Hi-Z
Hi-Z
Independent of TOLpq setting
Dependent on TOpq setting
Port output is enabled
Toggle
Toggle Toggle
Toggle
TOpq pin transition
Toggle
Remarks 1. Toggle: Reverse TOpq pin output status
2. pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: p = 0, pq = 00 to 04, 07
78K0R/LG3: p = 0, pq = 00 to 07
78K0R/LH3: p = 0, 1, pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011