UPD78F1502AGK-GAK-AX Datasheet, PDF (331/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
6.7.4 Operation as input pulse interval measurement
The count value can be captured at the TIpq valid edge and the interval of the pulse input to TIpq can be measured.
The pulse interval can be calculated by the following expression.
TIpq input pulse interval = Period of count clock × ((10000H × TSRpq: OVF) + (Capture value of TDRpq + 1))
Caution The TIpq pin input is sampled using the operating clock selected with the CKSpq bit of the
TMRpq register, so an error equal to the number of operating clocks occurs.
TCRpq operates as an up counter in the capture mode.
When the channel start trigger (TSpq) is set to 1, TCRpq counts up from 0000H in synchronization with the count clock.
When the TIpq pin input valid edge is detected, the count value is transferred (captured) to TDRpq and, at the same
time, the counter (TCRpq) is cleared to 0000H, and the INTTMpq is output. If the counter overflows at this time, the
OVFpq bit of the TSRpq register is set to 1. If the counter does not overflow, the OVFpq bit is cleared. After that, the
above operation is repeated.
As soon as the count value has been captured to the TDRpq register, the OVFpq bit of the TSRpq register is updated
depending on whether the counter overflows during the measurement period. Therefore, the overflow status of the
captured value can be checked.
If the counter reaches a full count for two or more periods, it is judged to be an overflow occurrence, and the OVFpq bit
of the TSRpq register is set to 1. However, the OVFpq bit is configured as a cumulative flag, the correct interval value
cannot be measured if an overflow occurs more than once.
Set STSpq2 to STSpq0 of the TMRpq register to 001B to use the valid edges of TIpq as a start trigger and a capture
trigger.
When TEpq = 1, instead of the TIpq pin input, a software operation (TSpq = 1) can be used as a capture trigger.
Figure 6-49. Block Diagram of Operation as Input Pulse Interval Measurement
CKp1
Operation clock
CKp0
Timer counter
(TCRpq)
TIpq pin
Edge
detection
TSpq
Data register
(TDRpq)
Interrupt
controller
Interrupt signal
(INTTMpq)
Remark
pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: p = 0, pq = 00 to 04, 07
78K0R/LG3: p = 0, pq = 00 to 07
78K0R/LH3: p = 0, 1, pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011