English
Language : 

UPD78F1502AGK-GAK-AX Datasheet, PDF (430/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 10 12-BIT A/D CONVERTER (μ PD78F150xA),
10-BIT A/D CONVERTER (μ PD78F151xA)
10.6 Cautions for A/D Converter
(1) Operating current in STOP mode
Shift to STOP mode after stopping the A/D converter (by setting bit 7 (ADCS) of the A/D converter mode register
(ADM) to 0). The operating current can be reduced by setting bit 0 (ADCE) of the A/D converter mode register (ADM)
to 0 at the same time.
When using normal mode 2 (LV1 = 0, LV0 = 1) or low voltage mode (LV1 = 1, LV0 = 0), clear bit 1 (VRGV) and bit 0
(VRON) of the analog reference voltage control register (ADVRC) to 0, and then shift to STOP mode.
To restart from the standby status, clear bit 0 (ADIF) of interrupt request flag register 1L (IF1L) to 0 and start
operation.
(2) Input range of ANI0 to ANI10, ANI15
Observe the rated range of the ANI0 to ANI10, ANI15 input voltage. If a voltage of AVDD0 or higher and AVSS or lower
(even in the range of absolute maximum ratings) is input to an analog input channel, the converted value of that
channel becomes undefined. In addition, the converted values of the other channels may also be affected.
(3) Conflicting operations
<1> Conflict between A/D conversion result register (ADCR, ADCRH) write and ADCR or ADCRH read by
instruction upon the end of conversion
ADCR or ADCRH read has priority. After the read operation, the new conversion result is written to ADCR or
ADCRH.
<2> Conflict between ADCR or ADCRH write and A/D converter mode register (ADM) write, analog input channel
specification register (ADS), or A/D port configuration register (ADPC) write upon the end of conversion
ADM, ADS, or ADPC write has priority. ADCR or ADCRH write is not performed, nor is the conversion end
interrupt signal (INTAD) generated.
(4) Noise countermeasures
To maintain the 12-bit resolution, attention must be paid to noise input to the AVREFP pin and pins ANI0 to ANI10,
ANI15.
<1> Connect a capacitor with a low equivalent resistance and a good frequency response to the power supply.
<2> The higher the output impedance of the analog input source, the greater the influence. To reduce the noise,
connecting external C as shown in Figure 10-26 is recommended.
<3> Do not switch these pins with other pins during conversion.
<4> The accuracy is improved if the HALT mode is set immediately after the start of conversion.
Remark 78K0R/LF3:
ANI0-ANI6, ANI15
78K0R/LG3, 78K0R/LH3: ANI0-ANI10, ANI15
R01UH0004EJ0501 Rev.5.01
414
Jun 20, 2011