UPD78F1502AGK-GAK-AX Datasheet, PDF (826/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 24 LOW-VOLTAGE DETECTOR
24.4 Operation of Low-Voltage Detector
The low-voltage detector can be used in the following two modes.
(1) Used as reset (LVIMD = 1)
• If LVISEL = 0, compares the supply voltage (VDD) and detection voltage (VLVI), generates an internal reset signal
when VDD < VLVI, and releases internal reset when VDD ≥ VLVI.
• If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and detection voltage (VEXLVI), generates
an internal reset signal when EXLVI < VEXLVI, and releases internal reset when EXLVI ≥ VEXLVI.
Remark
The low-voltage detector (LVI) can be set to ON by an option byte by default. If it is set to ON to raise
the power supply from the POC detection voltage (VPOR = 1.61 V (TYP.)) or lower, the internal reset
signal is generated when the supply voltage (VDD) < detection voltage (VLVI = 2.07 V ±0.2 V). After that,
the internal reset signal is generated when the supply voltage (VDD) < detection voltage (VLVI = 2.07 V
±0.1 V).
(2) Used as interrupt (LVIMD = 0)
• If LVISEL = 0, compares the supply voltage (VDD) and detection voltage (VLVI). When VDD drops lower than VLVI
(VDD < VLVI) or when VDD becomes VLVI or higher (VDD ≥ VLVI), generates an interrupt signal (INTLVI).
• If LVISEL = 1, compares the input voltage from external input pin (EXLVI) and detection voltage (VEXLVI = 1.21 V
±0.1 V). When EXLVI drops lower than VEXLVI (EXLVI < VEXLVI) or when EXLVI becomes VEXLVI or higher (EXLVI ≥
VEXLVI), generates an interrupt signal (INTLVI).
While the low-voltage detector is operating, whether the supply voltage or the input voltage from an external input pin is
more than or less than the detection level can be checked by reading the low-voltage detection flag (LVIF: bit 0 of LVIM).
Remark LVIMD: Bit 1 of low-voltage detection register (LVIM)
LVISEL: Bit 2 of LVIM
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011