UPD78F1502AGK-GAK-AX Datasheet, PDF (524/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
Figure 14-57. Procedure for Resuming Slave Reception
Starting setting for resumption
(Essential)
Manipulating target for communication
(Essential)
Port manipulation
(Selective) ^{Changing setting of SPSm register}
Stop the target for communication or wait
until the target completes its operation.
Disable clock output of the target
channel by setting a port register and a
port mode register.
Change the setting if an incorrect division
ratio of the operation clock is set.
(Selective) ^{Changing setting of SMRmn register}
(Selective) ^{Changing setting of SCRmn register}
(Selective) ^{Changing setting of SDRmn register}
Change the setting if the setting of the
SMRmn register is incorrect.
Change the setting if the setting of the
SCRmn register is incorrect.
Change the setting if the setting of the
SDRmn register is incorrect.
(Selective) ^{Changing setting of SOm register}
Manipulate the CKOmn bit and enable
reception.
(Essential) ^{Changing setting of SOEm register}
(Selective)
Clearing error flag
(Essential)
Port manipulation
(Essential)
Writing to SSm register
Clear the SOEm register to 0 and stop
data output of the target channel.
Cleared by using SIRmn register if FEF,
PEF, or OVF flag remains set.
Enable clock output of the target channel
by setting a port register and a port mode
register.
Set the SSmn bit of the target channel to
1 to set SEmn = 1.
(Essential)
Starting communication
Wait for a clock from the master.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011