UPD78F1502AGK-GAK-AX Datasheet, PDF (255/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
5.6.4 Example of controlling internal low-speed oscillation clock
The internal low-speed oscillation clock cannot be used as the CPU clock. Used only as the watchdog timer clock.
The internal low-speed oscillator automatically starts oscillation after a reset release, and the watchdog timer is driven
(30 kHz (TYP.)) if the watchdog timer operation is enabled by the option byte.
The internal low-speed oscillator continues oscillation except when the watchdog timer stops. When the watchdog
timer operates, the internal low-speed oscillation clock does not stop even in case of a program loop.
(1) Example of setting procedure when stopping the internal low-speed oscillation clock
The internal low-speed oscillation clock can be stopped in the following two ways.
• Stop the watchdog timer in the HALT/STOP mode by the option byte (bit 0 (WDSTBYON) of 000C0H = 0), and
execute the HALT or STOP instruction.
• Stop the watchdog timer by the option byte (bit 4 (WDTON) of 000C0H = 0).
(2) Example of setting procedure when restarting oscillation of the internal low-speed oscillation clock
The internal low-speed oscillation clock can be restarted as follows.
• Release the HALT or STOP mode
(only when the watchdog timer is stopped in the HALT/STOP mode by the option byte (bit 0 (WDSTBYON) of
000C0H) = 0) and when the watchdog timer is stopped as a result of execution of the HALT or STOP instruction).
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Jun 20, 2011