UPD78F1502AGK-GAK-AX Datasheet, PDF (415/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 10 12-BIT A/D CONVERTER (μ PD78F150xA),
10-BIT A/D CONVERTER (μ PD78F151xA)
(9) A/D port configuration register (ADPC)
This register switches the ANI0/AMP0-/P20 to ANI7/AMP2O/P27, ANI8/AMP2+/P150 to ANI10/P152 and
ANI15/AVREFM/P157 pins to analog input of A/D converter or digital I/O of port.
ADPC can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 10H.
Remark 78K0R/LF3:
ANI0-ANI6, ANI15
78K0R/LG3, 78K0R/LH3: ANI0-ANI10, ANI15
Figure 10-14. Format of A/D Port Configuration Register (ADPC)
Address: F0017H After reset: 10H R/W
Symbol
7
6
5
ADPC
0
0
0
4
ADPC4
3
ADPC3
2
ADPC2
1
ADPC1
0
ADPC0
ADP ADP ADP ADP ADP
C4 C3 C2 C1 C0
Port 15
Analog input (A)/digital I/O (D) switching
Port 2
00 0 00
00 0 01
00 0 10
00 0 11
00 1 00
00 1 01
00 1 10
Note→ 0 0 1 1 1
Note→ 0 1 0 0 0
Note→ 0 1 0 0 ₁
Note→ _{0 1 0 1 0}
01 1 11
10 0 00
Other than the above
ANI15 ANI10 ANI9 ANI8 ANI7 ANI6 ANI5 ANI4 ANI3 ANI2 ANI1 ANI0
/AVREFM /P152 /P151 /AMP2+ /AMP2O /AMP2- /AMP1+ /AMP1O /AMP1- /AMP0+ /AMP0O /AMP0-
/P157
/P150 /P27 /P26 /P25 /P24 /P23 /P22 /P21 /P20
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
A
A
D
D
A
A
A
A
A
A
A
A
A
D
D
D
A
A
A
A
A
A
A
A
D
D
D
D
A
A
A
A
A
A
A
D
D
D
D
D
A
A
A
A
A
A
D
D
D
D
D
D
A
A
A
A
A
D
D
D
D
D
D
D
A
A
A
A
D
D
D
D
D
D
D
D
A
A
A
D
D
D
D
D
D
D
D
D
A
A
D
D
D
D
D
D
D
D
D
D
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
Setting prohibited
Note This setting is prohibited for 78K0R/LF3.
Cautions 1. Set a channel to be used for A/D conversion in the input mode by using port mode registers 2
and 15 (PM2, PM15).
2. Do not set the pin that is set by ADPC as digital I/O by ADS.
R01UH0004EJ0501 Rev.5.01
399
Jun 20, 2011