UPD78F1502AGK-GAK-AX Datasheet, PDF (630/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 15 SERIAL INTERFACE IICA
Figure 15-27. Communication Reservation Protocol
DI
SET1 STT
Define communication
reservation
Wait
Sets STT flag (communication reservation)
Defines that communication reservation is in effect
(defines and sets user flag to any part of RAM)
Secures wait time^{Note 1} by software.
(Communication reservation)^{Note 2}
Yes
MSTS = 0?
Confirmation of communication reservation
No
(Generate start condition)
Cancel communication
reservation
Clear user flag
MOV IICA, #××H
IICA write operation
EI
Notes 1. The wait time is calculated as follows.
(IICWL setting value + IICWH setting value + 4 clocks) / fCLK + tF × 2
2. The communication reservation operation executes a write to the IICA shift register (IICA) when a stop
condition interrupt request occurs.
Remark STT: Bit 1 of IICA control register 0 (IICCTL0)
MSTS: Bit 7 of IICA status register (IICS)
IICA: IICA shift register
IICWL: IICA low-level width setting register
IICWH: IICA high-level width setting register
tF:
SDA0 and SCL0 signal falling times
fCLK: CPU/peripheral hardware clock frequency
R01UH0004EJ0501 Rev.5.01
614
Jun 20, 2011