UPD78F1502AGK-GAK-AX Datasheet, PDF (745/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 18 DMA CONTROLLER
18.5.3 CSI transmission/reception
A flowchart showing an example of setting for CSI transmission/reception is shown below.
• Transmission/reception (256 bytes) of CSI00
• DMA channel 0 is used to read received data and DMA channel 1 is used to write transmit data.
• DMA start source: INTCSI00
(If the same start source is specified for DMA channels 0 and 1, the data of channel 0 is transferred, and then that of
channel 1)
• Interrupt of CSI00 is specified by IFC03 to IFC00 = IFC13 to IFC10 (bits 3 to 0 of the DMCn register) = 0110B.
• Data is transferred (received) from FFF10H of the CSI data register (SIO00) to FF100H to FF1FFH of RAM (256
bytes). (In successive transmission/reception mode, the data that is to be received when the first buffer empty
interrupt occurs is invalid because the data has not been received.)
• Transfers FF201H to FF2FFH (255 bytes) of RAM to FFF10H of the data register (SIO00) of CSI (transmission)
(Transmit data is written to the first byte by using software (an instruction).)
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011