UPD78F1502AGK-GAK-AX Datasheet, PDF (655/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
(ii) When WTIM = 1
CHAPTER 15 SERIAL INTERFACE IICA
ST AD6 to AD0 R/W ACK
D7 to D0
12
ACK
D7 to D0
3
ACK SP
45
1: IICS = 0110×010B
2: IICS = 0010×110B
3: IICS = 0010×100B
4: IICS = 0010××00B
5: IICS = 00000001B
Remark : Always generated
: Generated only when SPIE = 1
×: Don’t care
(6) Operation when arbitration loss occurs (no communication after arbitration loss)
When the device is used as a master in a multi-master system, read the MSTS bit each time interrupt request
signal INTIICA has occurred to check the arbitration result.
(a) When arbitration loss occurs during transmission of slave address data (when WTIM = 1)
ST AD6 to AD0 R/W ACK
D7 to D0
1
ACK
D7 to D0
ACK SP
2
1: IICS = 01000110B
2: IICS = 00000001B
Remark
: Always generated
: Generated only when SPIE = 1
R01UH0004EJ0501 Rev.5.01
639
Jun 20, 2011