UPD78F1502AGK-GAK-AX Datasheet, PDF (758/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 19 INTERRUPT FUNCTIONS
Table 19-1. Interrupt Source List (2/3)
Interrupt
Type
Internal/
External
Basic
Configuration
Type
Note 1
Default
Priority^{Note 2}
Name
Interrupt Source
Trigger
Vector LF LG LH
Table 3 3 3
Address
Maskable Internal
(A)
External
(C)
Internal
(A)
External
(B)
21
INTTM01 End of timer channel 1 count or capture 0002EH √ √ √
22
INTTM02 End of timer channel 2 count or capture 00030H √ √ √
23
INTTM03 End of timer channel 3 count or capture 00032H √ √ √
24
INTAD
End of A/D conversion
25
INTRTC Fixed-cycle signal of real-time
counter/alarm match detection
26
INTRTCI Interval signal detection of real-time
counter
27
INTKR
Key return signal detection
28
INTST2 End of UART2 transmission/
INTCSI20 End of CSI20 communication/
INTIIC20 End of IIC20 communication
00034H √ √ √
00036H √ √ √
00038H √ √ √
0003AH − − √
0003CH √ √ √
√√√
√√√
29
INTSR2 End of UART2 reception
0003EH √ √ √
30
INTSRE2 UART2 reception error occurrence
00040H √ √ √
31
INTTM04 End of timer channel 4 count or capture 00042H √ √ √
32
INTTM05 End of timer channel 5 count or capture 00044H √ √ √
33
INTTM06 End of timer channel 6 count or capture 00046H √ √ √
34
INTTM07 End of timer channel 7 count or capture 00048H √ √ √
35
INTP6
Pin input edge detection
0004AH √ √ √
36
INTP7
0004CH √ √ √
37
INTP8
0004EH − √ √
38
INTP9
39
INTP10
40
INTP11
00050H − √ √
00052H − √ √
00054H − √ √
Notes 1.
2.
The default priority determines the sequence of interrupts if two or more maskable interrupts occur
simultaneously. Zero indicates the highest priority and 45 indicates the lowest priority.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 19-1.
R01UH0004EJ0501 Rev.5.01
742
Jun 20, 2011