UPD78F1502AGK-GAK-AX Datasheet, PDF (277/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
6.3 Registers Controlling Timer Array Unit
Timer array unit is controlled by the following registers.
• Peripheral enable register 0 (PER0)
• Timer clock select register m (TPSm)
• Timer mode register mn (TMRmn)
• Timer status register pq (TSRpq)
• Timer channel enable status register m (TEm)
• Timer channel start register m (TSm)
• Timer channel stop register m (TTm)
• Timer input select registers 0, 1 (TIS0, TIS1)
• Timer output enable register p (TOEp)
• Timer output register p (TOp)
• Timer output level register p (TOLp)
• Timer output mode register p (TOMp)
• Input switch control register (ISC)
• Noise filter enable registers 1, 2 (NFEN1, NFEN2)
• Port mode registers 1, 3, 5, 8 (PM1, PM3, PM5, PM8)
• Port registers1, 3, 5, 8 (P1, P3, P5, P8)
Remark
mn: Unit number + Channel number, pq: Unit number + Channel number (only for channels provided with
timer I/O pins)
78K0R/LF3: m = 0, 1, mn = 00 to 07, 10 to 13, p = 0, pq = 00 to 04, 07
78K0R/LG3: m = 0, 1, mn = 00 to 07, 10 to 13, p = 0, pq = 00 to 07
78K0R/LH3: m = 0, 1, mn = 00 to 07, 10 to 13, p = 0, 1, pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
261
Jun 20, 2011