UPD78F1502AGK-GAK-AX Datasheet, PDF (599/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 15 SERIAL INTERFACE IICA
(13) Bus status detector
This circuit detects whether or not the bus is released by detecting start conditions and stop conditions.
However, as the bus status cannot be detected immediately following operation, the initial status is set by the
STCEN bit.
Remark
STT bit:
SPT bit:
IICRSV bit:
IICBSY bit:
STCF bit:
STCEN bit:
Bit 1 of IICA control register 0 (IICCTL0)
Bit 0 of IICA control register 0 (IICCTL0)
Bit 0 of IICA flag register (IICF)
Bit 6 of IICA flag register (IICF)
Bit 7 of IICA flag register (IICF)
Bit 1 of IICA flag register (IICF)
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011