UPD78F1502AGK-GAK-AX Datasheet, PDF (822/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 24 LOW-VOLTAGE DETECTOR
Figure 24-2. Format of Low-Voltage Detection Register (LVIM)
Address: FFFA9H After reset: 00H^{Note 1} R/W^{Note 2}
Symbol
<7>
6
5
4
LVIM
LVION
0
0
0
3
<2>
<1>
<0>
0
LVISEL
LVIMD
LVIF
LVION^{Notes 3, 4}
0
Disables operation
1
Enables operation
Enables low-voltage detection operation
LVISEL^{Note 3}
Voltage detection selection
0
Detects level of supply voltage (VDD)
1
Detects level of input voltage from external input pin (EXLVI)
LVIMD ^{Note 3}
Low-voltage detection operation mode (interrupt/reset) selection
0
• LVISEL = 0: Generates an internal interrupt signal when the supply voltage (VDD) drops
lower than the detection voltage (VLVI) (VDD < VLVI) or when VDD becomes
VLVI or higher (VDD ≥ VLVI).
• LVISEL = 1: Generates an interrupt signal when the input voltage from an external
input pin (EXLVI) drops lower than the detection voltage (VEXLVI) (EXLVI <
VEXLVI) or when EXLVI becomes VEXLVI or higher (EXLVI ≥ VEXLVI).
1
• LVISEL = 0: Generates an internal reset signal when the supply voltage (VDD) <
detection voltage (VLVI) and releases the reset signal when VDD ≥ VLVI.
• LVISEL = 1: Generates an internal reset signal when the input voltage from an
external input pin (EXLVI) < detection voltage (VEXLVI) and releases the
reset signal when EXLVI ≥ VEXLVI.
LVIF
0
1
Low-voltage detection flag
• LVISEL = 0: Supply voltage (VDD) ≥ detection voltage (VLVI), or when LVI operation is
disabled
• LVISEL = 1: Input voltage from external input pin (EXLVI) ≥ detection voltage (VEXLVI),
or when LVI operation is disabled
• LVISEL = 0: Supply voltage (VDD) < detection voltage (VLVI)
• LVISEL = 1: Input voltage from external input pin (EXLVI) < detection voltage (VEXLVI)
Notes 1.
2.
3.
The reset value changes depending on the reset source and the setting of the option byte.
This register is not cleared (00H) by LVI reset.
It is set to “82H” when a reset signal other than LVI is applied if option byte LVIOFF = 0, and to “00H” if
option byte LVIOFF = 1.
Bit 0 is read-only.
LVION, LVIMD, and LVISEL are cleared to 0 in the case of a reset other than an LVI reset. These are not
cleared to 0 in the case of an LVI reset.
R01UH0004EJ0501 Rev.5.01
806
Jun 20, 2011