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UPD78F1502AGK-GAK-AX Datasheet, PDF (908/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 31 ELECTRICAL SPECIFICATIONS
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DC Characteristics (8/11)
(TA = −40 to +85°C, 1.8 V ≤ VDD = EVDD ≤ 5.5 V, 1.8 V ≤ AVDD0 ≤ VDD,
1.8 V ≤ AVDD ≤ VDD, 1.8 V ≤ EVDD1 = VDD, VSS = EVSS = AVSS = 0 V)
1.8 V ≤ AVDD1 ≤ VDD,
Parameter Symbol
Conditions
MIN. TYP. MAX. Unit
Supply
IDD1
current
Note 1
Operating
mode
fMX = 20 MHz, VDD = 5.0 V Note 2
Square wave input
Resonator connection
5.5 7.7
mA
5.8 8.0
mA
fMX = 20 MHz, VDD = 3.0 V Note 2
Square wave input
5.5 7.7
mA
Resonator connection
5.8 8.0
mA
fMX = 10 MHz, VDD = 5.0 V Notes 2, 3 Square wave input
3.2 4.6
mA
Resonator connection
3.3 4.7
mA
fMX = 10 MHz, VDD = 3.0 V Notes 2, 3 Square wave input
3.2 4.6
mA
Resonator connection
3.3 4.7
mA
fMX = 5 MHz, VDD = 3.0 V Notes 2, 3
Square wave input
1.8 2.7
mA
Resonator connection
1.9 2.8
mA
fMX = 5 MHz, VDD = 2.0 V Notes 2, 3
Square wave input
1.3 2.2
mA
Resonator connection
1.3 2.2
mA
fIH = 20 MHz Note 4
VDD = 5.0 V
5.7 8.0
mA
VDD = 3.0 V
5.7 8.0
mA
fIH = 8 MHz Note 4
VDD = 5.0 V
2.6 3.7
mA
VDD = 3.0 V
2.6 3.7
mA
fIH = 1 MHz ,
RMC = 5AH, OSMC = 02H Note 4
VDD = 3.0 V
190 354
μA
fSUB = 32.768 kHz,
FSEL = 0,
SDIV = 1,
AMPHS1 = 1 Note 5
TA = −40 to
+50°C
TA = −40 to
+70°C
VDD = 5.0 V
VDD = 3.0 V
VDD = 2.0 V
VDD = 5.0 V
VDD = 3.0 V
3.9 8.4
μA
3.9 8.4
μA
3.9 8.4
μA
3.9 11.3
μA
3.9 11.3
μA
VDD = 2.0 V
3.9 11.3
μA
TA = −40 to
+85°C
VDD = 5.0 V
VDD = 3.0 V
3.9 14.6
μA
3.9 14.6
μA
VDD = 2.0 V
3.9 14.6
μA
Notes 1. Total current flowing into VDD, EVDD, AVDD0 , AVDD1, AVDD, EVDD1, and VLC0 to VLC3, including the input leakage
current flowing when the level of the input pin is fixed to VDD or VSS, and excluding the current flowing into the real-
time counter, watchdog timer, LVI circuit, A/D converter, D/A converter Note 6, operational amplifier Note 6, voltage
reference Note 6, LCD controller/driver, I/O port, and on-chip pull-up/pull-down resistors. The maximum values include
the peripheral operation current.
2. When internal high-speed oscillator and subsystem clock are stopped.
3. When AMPH (bit 0 of clock operation mode control register (CMC)) = 0 and FLPC, FSEL (bits 1, 0 of operation
speed mode control register (OSMC)) = 0, 0.
4. When high-speed system clock and subsystem clock are stopped.
5. When internal high-speed oscillation, and high-speed system clock are stopped. When watchdog timer is
stopped.
6. Dedicated to μ PD78F150xA
Remarks 1. fMX: High-speed system clock frequency (X1 clock oscillation frequency or external main system clock
frequency)
2. fIH: Internal high-speed oscillation clock frequency
3. fSUB: Subsystem clock frequency (XT1 clock oscillation frequency)
R01UH0004EJ0501 Rev.5.01
892
Jun 20, 2011