UPD78F1502AGK-GAK-AX Datasheet, PDF (1004/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
Function
Details of
Function
APPENDIX C LIST OF CAUTIONS
Cautions
(32/39)
Page
Power-on-
clear
circuit
Low-
voltage
detector
−
If the low-voltage detector (LVI) is set to ON by an option byte by default, the reset pp.798, _†
signal is not released until the supply voltage (VDD) exceeds 2.07 V ±0.2 V.
799
If an internal reset signal is generated in the POC circuit, the reset control flag p.798 _†
register (RESF) is cleared to 00H.
Timing of
Set the low-voltage detector by software after the reset status is released (see p.800 _†
generation of CHAPTER 24 LOW-VOLTAGE DETECTOR).
internal reset
signal (LVIOFF =
1)
Timing of
Set the low-voltage detector by software after the reset status is released (see p.801 _†
generation of CHAPTER 24 LOW-VOLTAGE DETECTOR).
internal reset
signal (LVIOFF =
0)
Cautions for
In a system where the supply voltage (VDD) fluctuates for a certain period in the p.802 _†
power-on-clear vicinity of the POC detection voltage (VPOR, VPDR), the system may be repeatedly
circuit
reset and released from the reset status. In this case, the time from release of reset
to the start of the operation of the microcontroller can be arbitrarily set by taking the
following action.
LVIM: Low-
To stop LVI, be sure to clear (0) LVION by using a 1-bit memory manipulation p.807 _†
voltage detection instruction.
register
Input voltage from external input pin (EXLVI) must be EXLVI < VDD.
p.807 _†
When LVI is used in interrupt mode (LVIMD = 0) and LVISEL is set to 0, an interrupt p.807 _†
request signal (INTLVI) that disables LVI operation (clears LVION) when the supply
voltage (VDD) is less than or equal to the detection voltage (VLVI) (if LVISEL = 1, input
voltage of external input pin (EXLVI) is less than or equal to the detection voltage
(VEXLVI)) is generated and LVIIF may be set to 1.
LVIS: Low-
Be sure to clear bits 4 to 7 to “0”.
p.808 _†
voltage detection Change the LVIS value with either of the following methods.
p.809 _†
level select
• When changing the value after stopping LVI
register
<1> Stop LVI (LVION = 0).
<2> Change the LVIS register.
<3> Set to the mode used as an interrupt (LVIMD = 0).
<4> Mask LVI interrupts (LVIMK = 1).
<5> Enable LVI operation (LVION = 1).
<6> Before cancelling the LVI interrupt mask (LVIMK = 0), clear it with software
because an LVIIF flag may be set when LVI operation is enabled.
• When changing the value after setting to the mode used as an interrupt (LVIMD =
0)
<1> Mask LVI interrupts (LVIMK = 1).
<2> Set to the mode used as an interrupt (LVIMD = 0).
<3> Change the LVIS register.
<4> Before cancelling the LVI interrupt mask (LVIMK = 0), clear it with software
because an LVIIF flag may be set when the LVIS register is changed.
When an input voltage from the external input pin (EXLVI) is detected, the detection p.809 _†
voltage (VEXLVI) is fixed. Therefore, setting of LVIS is not necessary.
R01UH0004EJ0501 Rev.5.01
988
Jun 20, 2011