UPD78F1502AGK-GAK-AX Datasheet, PDF (733/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 18 DMA CONTROLLER
CHAPTER 18 DMA CONTROLLER
The DMA (Direct Memory Access) controller is mounted onto all 78K0R/Lx3 microcontroller products.
Data can be automatically transferred between the peripheral hardware supporting DMA, SFRs, and internal RAM
without via CPU.
As a result, the normal internal operation of the CPU and data transfer can be executed in parallel with transfer
between the SFR and internal RAM, and therefore, a large capacity of data can be processed. In addition, real-time
control using communication, timer, and A/D can also be realized.
18.1 Functions of DMA Controller
{ Number of DMA channels: 2
{ Transfer unit: 8 or 16 bits
{ Maximum transfer unit: 1024 times
{ Transfer type: 2-cycle transfer (One transfer is processed in 2 clocks and the CPU stops during that
processing.)
{ Transfer mode: Single-transfer mode
{ Transfer target: Between SFR and internal RAM
{ Transfer request: Selectable from the following peripheral hardware interrupts
Peripheral hardware
Timer array
unit 0
Channel 0
Channel 1
Channel 4
Channel 5
Serial array
unit 0
CSI00
CSI01
CSI10
UART0
UART1
IIC10
Serial array
unit 1
UART3
A/D converter
√: Supported, −: Not supported
78K0R/LF3
(μPD78F150nA: n = 0 to 2)
80 pins
√
√
√
√
−
−
√
−
√
√
√
√
78K0R/LG3
(μPD78F150nA: n = 3 to 5)
100 pins
√
√
√
√
√
−
√
√
√
√
√
√
78K0R/LH3
(μPD78F150nA: n = 6 to 8)
128 pins
√
√
√
√
√
√
√
√
√
√
√
√
R01UH0004EJ0501 Rev.5.01
717
Jun 20, 2011