UPD78F1502AGK-GAK-AX Datasheet, PDF (285/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
(5) Timer channel enable status register m (TEm)
TEm is used to enable or stop the timer operation of each channel.
When a bit of timer channel start register m (TSm) is set to 1, the corresponding bit of this register is set to 1.
When a bit of timer channel stop register m (TTm) is set to 1, the corresponding bit of this register is cleared to 0.
TEm can be read by a 16-bit memory manipulation instruction.
The lower 8 bits of TEm can be set with a 1-bit or 8-bit memory manipulation instruction with TEmL.
Reset signal generation clears this register to 0000H.
Figure 6-9. Format of Timer Channel Enable Status Register m (TEm)
Address: F01B0H, F01B1H After reset: 0000H R
Symbol
15 14 13 12 11 10 9
TE0
0
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
0 TE07 TE06 TE05 TE04 TE03 TE02 TE01 TE00
Address: F01D8H, F01D9H After reset: 0000H R
Symbol
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
TE1
0
0
0
0
0
0
0
0
0
0
0
0 TE13 TE12 TE11 TE10
TE
mn
0 Operation is stopped.
1 Operation is enabled.
Indication of operation enable/stop status of channel n
Remark mn: Unit number + Channel number
m = 0, 1, mn = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011