UPD78F1502AGK-GAK-AX Datasheet, PDF (350/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
Figure 6-65. Example of Set Contents of Registers When One-Shot Pulse Output Function Is Used (Slave Channel)
(a) Timer mode register mp (TMRmp)
15 14 13 12 11 10 9
8
7
6
5
TMRmp CKSmp
1/0 0
CCSmp ^MAS STSmp2 STSmp1 STSmp0 CISmp1 CISmp0
TERmp
0
0
0
1
0
0
0
0
0
4
3
2
1
0
MDmp3 MDmp2 MDmp1 MDmp0
0
1
0
0
0
Operation mode of channel p
100B: One-count mode
Start trigger during operation
0: Trigger input is invalid.
Selection of TImp pin input edge
00B: Sets 00B because these are not used.
Start trigger selection
100B: Selects INTTMmn of master channel.
Slave/master selection
0: Channel 0 is set as slave channel.
Count clock selection
0: Selects operation clock.
Operation clock selection
0: Selects CKm0 as operation clock of channel p.
1: Selects CKm1 as operation clock of channel p.
* Make the same setting as master channel.
(b) Timer output register m (TOm)
Bit p
TOm
TOmp
1/0
0: Outputs 0 from TOmp.
1: Outputs 1 from TOmp.
(c) Timer output enable register m (TOEm)
Bit p
TOEm TOEmp
1/0
0: Stops the TOmp output operation by counting operation.
1: Enables the TOmp output operation by counting operation.
(d) Timer output level register m (TOLm)
Bit p
TOLm
TOLmp
1/0
0: Positive logic output (active-high)
1: Inverted output (active-low)
(e) Timer output mode register m (TOMm)
Bit p
TOMm TOMmp
1
1: Sets the combination operation mode.
Remarks 1.
2.
3.
78K0R/LF3:
• m = 0, n = 0, 2, 6, p = n+1, TO00 to TO04, TO07, TI00 to TI04, and TI07 pins
78K0R/LG3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07, TI00 to TI07 pins
78K0R/LH3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07, TI00 to TI07 pins
• m = 1, n = 0, 2, p = n+1, TO10 to TO13, TI10 to TI13 pins
R01UH0004EJ0501 Rev.5.01
334
Jun 20, 2011