UPD78F1502AGK-GAK-AX Datasheet, PDF (97/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 3 CPU ARCHITECTURE
(4) On-chip debug security ID setting area
A 10-byte area of 000C4H to 000CDH and 010C4H to 010CDH can be used as an on-chip debug security ID setting
area. Set the on-chip debug security ID of 10 bytes at 000C4H to 000CDH when the boot swap is not used and at
000C4H to 000CDH and 010C4H to 010CDH when the boot swap is used. For details, see CHAPTER 28 ON-CHIP
DEBUG FUNCTION.
3.1.2 Mirror area
<R>
The μPD78F1500A, 78F1503A, 78F01506A, 78F1510A, 78F1513A, and 78F1516A mirror the data flash area of
00000H to 0FFFFH, to F0000H to FFFFFH (the data flash area to be mirrored is set by the processor mode control
register (PMC)).
<R>
The μPD78F1501A, 78F1502A, 78F1504A, 78F1505A, 78F1507A, 78F1508A, 78F1512A, 78F1515A, and 78F1518A
mirror the data flash area of 00000H to 0FFFFH or 10000H to 1FFFFH, to F0000H to FFFFFH (the data flash area to be
mirrored is set by the processor mode control register (PMC)).
By reading data from F0000H to FFFFFH, an instruction that does not have the ES registers as an operand can be
used, and thus the contents of the data flash can be read with the shorter code. However, the data flash area is not
mirrored to the SFR, extended SFR, RAM, and use prohibited areas.
The mirror area can only be read and no instruction can be fetched from this area.
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Jun 20, 2011