UPD78F1502AGK-GAK-AX Datasheet, PDF (219/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 4 PORT FUNCTIONS
Table 4-11. Settings of Port Mode Register and Output Latch When Using Alternate Function (4/5)
Pin Name
Alternate Function
PFALL
ISC
PM××
P××
Function Name
I/O
(PFxxx)
(ISCx)
− − √ P86
TI12
Input
−
−
1
×
TO12
Output
−
−
0
0
− − √ P87
TI13
Input
−
−
1
×
TO13
Output
−
−
0
0
√ √ √ P110, P111
√ √ √ P120
√ √ √ P121
√ √ √ P122
√ √ √ P123
√ √ √ P124
− √ √ P150^{Note 2}
ANO0, ANO1
INTP0^{Note 1}
EXLVI^{Note 1}
X1^{Note 1}
X2^{Note 1}
EXCLK^{Note 1}
XT1^{Note 1}
XT2^{Note 1}
ANI8
Output
−
−
0
×
Input
−
ISC0 = 0
1
×
Input
−
−
1
×
−
−
−
×
×
−
−
−
×
×
Input
−
−
×
×
−
−
−
×
×
−
−
−
×
×
Input
−
−
1
×
AMP2+
− √ √ P151, P152^{Note 2} ANI9, ANI10
√ √ √ P157^{Note 2}
ANI15
Input
Input
Input
−
−
1
×
−
−
1
×
−
−
1
×
AVREFM
Input
−
−
1
×
Notes 1. To use the P121 to P124 pins for main system clock resonator connection (X1, X2), subsystem clock
resonator connection (XT1, XT2), or main system clock external clock input (EXCLK), the X1 oscillation
mode, XT1 oscillation mode, or external clock input mode must be set, respectively, by using the clock
operation mode control register (CMC). CMC can be written only once after reset release (for details, refer
to 5.3 (1) Clock operation mode control register (CMC)). The reset value of CMC is 00H (both P121 to
P124 are input port pins).
2. The P150/ANI8/AMP2+, P151/ANI9, P152/ANI10, P157/ANI15/AVREFM pins are as shown below depending
on the settings of the A/D port configuration register (ADPC), port mode register 2 (PM2), analog input
channel specification register (ADS), operational amplifier control register (OAC), and analog reference
voltage control register (ADVRC). Refer to 4.2.16 Port 15.
Remark
×:
don’t care
−:
Not applicable
PFALL: Port function register
ISC: Input switch control register
PM××: Port mode register
P××: Port output latch
R01UH0004EJ0501 Rev.5.01
203
Jun 20, 2011