UPD78F1502AGK-GAK-AX Datasheet, PDF (768/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 19 INTERRUPT FUNCTIONS
(2) Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H)
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
MK0L, MK0H, MK1L, MK1H, MK2L, and MK2H can be set by a 1-bit or 8-bit memory manipulation instruction. When
MK0L and MK0H, MK1L and MK1H, and MK2L and MK2H are combined to form 16-bit registers MK0, MK1, and MK2,
they can be set by a 16-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark If an instruction that writes data to this register is executed, the number of instruction execution clocks
increases by 2 clocks.
Figure 19-5. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H) (78K0R/LF3)
Address: FFFE4H After reset: FFH R/W
Symbol
<7>
<6>
<5>
MK0L
PMK5
PMK4
PMK3
<4>
PMK2
<3>
PMK1
<2>
PMK0
<1>
LVIMK
<0>
WDTIMK
Address: FFFE5H After reset: FFH R/W
Symbol
<7>
6
5
MK0H
SREMK0
1
1
<4>
DMAMK1
<3>
DMAMK0
<2>
SREMK3
<1>
SRMK3
<0>
STMK3
Address: FFFE6H After reset: FFH R/W
Symbol
<7>
<6>
<5>
<4>
3
<2>
<1>
<0>
MK1L
TMMK03 TMMK02 TMMK01 TMMK00
1
SREMK1 SRMK1 CSIMK10
IICMK10
STMK1
Address: FFFE7H After reset: FFH R/W
Symbol
<7>
<6>
<5>
<4>
3
MK1H
TMMK04 SREMK2 SRMK2 CSIMK20
1
IICMK20
STMK2
<2>
RTCIMK
<1>
RTCMK
<0>
ADMK
Address: FFFD4H After reset: FFH R/W
Symbol
7
6
5
MK2L
1
1
1
<4>
PMK7
<3>
PMK6
<2>
TMMK07
<1>
TMMK06
<0>
TMMK05
Address: FFFD5H After reset: FFH R/W
Symbol
7
6
<5>
<4>
<3>
<2>
<1>
0
MK2H
1
1
MDMK TMMK13 TMMK12 TMMK11 TMMK10
1
XXMKX
0
1
Interrupt servicing enabled
Interrupt servicing disabled
Interrupt servicing control
Caution Be sure to set bits 5, 6 of MK0H, bit 3 of MK1L, bit 3 of MK1H, bits 5 to 7 of MK2L, bits 0, 6, 7 of MK2H
to 1.
R01UH0004EJ0501 Rev.5.01
752
Jun 20, 2011