UPD78F1502AGK-GAK-AX Datasheet, PDF (451/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 13 VOLTAGE REFERENCE (μ PD78F150xA only)
13.3 Amplifier Registers Used in Voltage Reference
The voltage reference uses the following two registers.
• Peripheral enable register 0 (PER0)
• Analog reference voltage control register (ADVRC)
(1) Peripheral enable register 0 (PER0)
PER0 is used to enable or disable use of each peripheral hardware macro. Clock supply to a hardware macro that is
not used is stopped in order to reduce the power consumption and noise.
When the voltage reference is used, be sure to set bit 5 (ADCEN) of this register to 1.
PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 13-2. Format of Peripheral Enable Register 0 (PER0)
Address: F00F0H After reset: 00H R/W
Symbol
<7>
<6>
<5>
PER0
RTCEN DACEN ADCEN
<4>
IICAEN^Note
<3>
SAU1EN
<2>
SAU0EN
<1>
TAU1EN
<0>
TAU0EN
ADCEN
0
1
Control of A/D converter, operational amplifier, and voltage reference input clock
Stops input clock supply.
• SFR used by the A/D converter, operational amplifier, and voltage reference cannot be
written.
• The A/D converter, operational amplifier, and voltage reference is in the reset status.
Supplies input clock.
• SFR used by the A/D converter, operational amplifier, and voltage reference can be read
and written.
Note 78K0R/LG3, 78K0R/LH3 only
Caution When setting voltage reference, be sure to set ADCEN to 1 first. If ADCEN = 0, writing to
a control register of voltage reference is ignored, and, even if the register is read, only
the default value is read.
(2) Analog reference voltage control register (ADVRC)
This register is used to select the reference voltage supplies of the A/D and D/A converters, control the operation of
the input gate voltage boost circuit for the A/D converter, and control the voltage reference (VR) operation.
ADVRC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
R01UH0004EJ0501 Rev.5.01
435
Jun 20, 2011