UPD78F1502AGK-GAK-AX Datasheet, PDF (506/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
(2) Operation procedure
Figure 14-39. Initial Setting Procedure for Master Transmission/Reception
Starting initial setting
Setting PER0 register
Setting SPSm register
Release the serial array unit from the
reset status and start clock supply.
Set the prescaler.
Setting SMRmn register
Set an operation mode, etc.
Setting SCRmn register
Set a communication format.
Setting SDRmn register
Set a transfer baud rate.
Setting SOm register
Manipulate the SOmn and CKOmn bits
and set an initial output level.
Changing setting of SOEm register
Setting port
Set the SOEmn bit to 1 and enable
data output of the target channel.
Enable data output and clock output of
the target channel by setting a port
register and a port mode register.
Writing to SSm register
Starting communication
Set the SSmn bit of the target channel
to 1 to set SEmn = 1.
Set transmit data to the SIOp register
(bits 7 to 0 of the SDRmn register) and
start communication.
Caution After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more clocks have
elapsed.
Figure 14-40. Procedure for Stopping Master Transmission/Reception
Starting setting to stop
Setting STm register
Changing setting of SOEm
register
Write 1 to the STmn bit of the target
channel.
Set the SOEm register and stop the
output of the target channel.
Stopping communication
Stop communication in midway.
Remark Even after communication is stopped, the pin level is retained. To resume the operation, re-set the SOm
register (see Figure 14-41 Procedure for Resuming Master Transmission/Reception).
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011