UPD78F1502AGK-GAK-AX Datasheet, PDF (940/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 31 ELECTRICAL SPECIFICATIONS
<R> _{(5) D/A Converter (μ PD78F150xA)}
(a) TA = 0 to 50°C, 1.8 V ≤ DAREFP ≤ AVDD1, 2.3 V ≤ AVDD1 = VDD ≤ 3.6 V, VSS = EVSS = AVSS = 0 V
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
Resolution
Settling time
RES
tSET
12
12
12
bit
18
μs
Off-set error
Gain error
Integral non-linearity error
Differential non-linearity error
EO
EG
ILE
DLE
ISOURCE = ISINK = 0 mA,
0.1 V ≤ ANOn ≤ AVDD1−0.1 V (n = 0, 1)
±5
±10
mV
±5
±10
mV
±2.0
±4.0
LSB
±2.0 LSB
D/A output resistance value
RO
0 V ≤ ANOn ≤ 0.3 V or
AVDD1−0.3 V ≤ ANOn ≤ AVDD1 (n = 0, 1)
0.3 V ≤ ANOn ≤ AVDD1−0.3 V (n = 0, 1)
150
250
Ω
5
10
Ω
Output source current
ISOURCE 0.3 V ≤ ANOn ≤ AVDD1−0.3 V (n = 0, 1)
0.1
mA
Output sink current
ISINK
0.1
mA
(b) TA = −40 to +85°C, 1.8 V ≤ DAREFP ≤ AVDD1, 2.3 V ≤ AVDD1 = VDD ≤ 5.5 V, VSS = EVSS = AVSS = 0 V
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
Resolution
Settling time
Off-set error
Gain error
Integral non-linearity error
Differential non-linearity error
RES
tSET
EO
EG
ILE
DLE
ISOURCE = ISINK = 0 mA,
0.1 V ≤ ANOn ≤ AVDD1−0.1 V (n = 0, 1)
12
12
12
bit
18
μs
±5
±20
mV
±5
±20
mV
±6.0 ±12.0 LSB
±8.0 LSB
D/A output resistance value
RO
0 V ≤ ANOn ≤ 0.3 V or
AVDD1−0.3 V ≤ ANOn ≤ AVDD1 (n = 0, 1)
0.3 V ≤ ANOn ≤ AVDD1−0.3 V (n = 0, 1)
150
250
Ω
5
20
Ω
Output source current
Output sink current
ISOURCE
ISINK
0.3 V ≤ ANOn ≤ AVDD1−0.3 V (n = 0, 1)
0.1
mA
0.1
mA
Remarks 1. Use the D/A converter under the condition of the Output load capacitance (C) = 50 pF (max.).
2. DAREFP is the input voltage from the AVREFP pin, the voltage generated by the voltage reference, or the
input voltage from the AVDD1 pin. It is selected as the positive reference voltage of the D/A converter.
R01UH0004EJ0501 Rev.5.01
924
Jun 20, 2011