UPD78F1502AGK-GAK-AX Datasheet, PDF (731/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 17 MULTIPLIER/DIVIDER
17.4.2 Division operation
• Initial setting
<1> Set bit 7 (DIVMODE) of the multiplication/division control register (MDUC) to 1.
<2> Set the dividend (higher 16 bits) to the multiplication/division data register A (H) (MDAH).
<3> Set the dividend (lower 16 bits) to the multiplication/division data register A (L) (MDAL).
<4> Set the divisor (higher 16 bits) to the multiplication/division data register B (H) (MDBH).
<5> Set the divisor (lower 16 bits) to the multiplication/division data register B (L) (MDBL).
<6> Set bit 0 (DIVST) of MDUC to 1.
(There is no preference in the order of executing steps <2> to <5>.)
• During operation processing
<7> The operation will end when one of the following processing is completed.
• A wait of at least 16 clocks (The operation will end when 16 clocks have been issued.)
• A check whether DIVST has been cleared
• Generation of a division completion interrupt (INTMD)
(The read values of MDBL, MDBH, MDCH, and MDCL during operation processing are not guaranteed.)
• Operation end
<8> DIVST is cleared (0) and an interrupt request signal (INTMD) is generated (end of operation).
<9> Read the quotient (lower 16 bits) from MDAL.
<10> Read the quotient (higher 16 bits) from MDAH.
<11> Read the remainder (lower 16 bits) from multiplication/division data register C (L) (MDCL).
<12> Read the remainder (higher 16 bits) from the multiplication/division data register C (H) (MDCH).
(There is no preference in the order of executing steps <9> to <12>.)
• Next operation
<13> To execute multiplication operation next, start from the “Initial setting” in 17.4.1 Multiplication operation.
<14> To execute division operation next, start from the “Initial setting” for division operation.
Remark Steps <1> to <12> correspond to <1> to <12> in Figure 17-7.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011