UPD78F1502AGK-GAK-AX Datasheet, PDF (339/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
6.8 Operation of Plural Channels of Timer Array Unit
6.8.1 Operation as PWM function
Two channels can be used as a set to generate a pulse of any period and duty factor.
The period and duty factor of the output pulse can be calculated by the following expressions.
Pulse period = {Set value of TDRmn (master) + 1} × Count clock period
Duty factor [%] = {Set value of TDRmp (slave)}/{Set value of TDRmn (master) + 1} × 100
0% output: Set value of TDRmp (slave) = 0000H
100% output: Set value of TDRmp (slave) ≥ {Set value of TDRmn (master) + 1}
Remark The duty factor exceeds 100% if the set value of TDRmp (slave) > (set value of TDRmn (master) + 1), it
summarizes to 100% output.
The master channel operates in the interval timer mode and counts the periods. When the channel start trigger (TSmn)
is set to 1, INTTMmn is output. TCRmn counts down starting from the loaded value of TDRmn, in synchronization with the
count clock. When TCRmn = 0000H, INTTMmn is output. TCRmn loads the value of TDRmn again. After that, it
continues the similar operation.
TCRmp of a slave channel operates in one-count mode, counts the duty factor, and outputs a PWM waveform from the
TOmp pin. TCRmp of the slave channel loads the value of TDRmp, using INTTMmn of the master channel as a start
trigger, and stops counting until the next start trigger (INTTMmn of the master channel) is input.
The output level of TOmp becomes active one count clock after generation of INTTMmn from the master channel, and
inactive when TCRmp = 0000H.
Caution To rewrite both TDRmn of the master channel and TDRmp of the slave channel, a write access is
necessary two times. The timing at which the values of TDRmn and TDRmp are loaded to TCRmn and
TCRmp is upon occurrence of INTTMmn of the master channel. Thus, when rewriting is performed
split before and after occurrence of INTTMmn of the master channel, the TOmp pin cannot output the
expected waveform. To rewrite both TDRmn of the master and TDRmp of the slave, therefore, be sure
to rewrite both the registers immediately after INTTMmn is generated from the master channel.
Remarks 1.
2.
3.
78K0R/LF3:
• m = 0, n = 0, 2, 6, p = n+1, TO00 to TO04, and TO07 pins
78K0R/LG3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07 pins
78K0R/LH3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07 pins
• m = 1, n = 0, 2, p = n+1, TO10 to TO13 pins
R01UH0004EJ0501 Rev.5.01
323
Jun 20, 2011