UPD78F1502AGK-GAK-AX Datasheet, PDF (227/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
• Keep the wiring length between the XT1 and XT2 pins and resonator as short as
possible and parasitic capacitance and wire resistance as small as possible. This
is particularly important when super-low-consumption oscillation (AMPHS1 = 1) is
selected.
• Configure the circuit board by using material with little parasitic capacitance and
wire resistance.
• Place a ground pattern that has the same potential as VSS (if possible) around the
XT1 oscillator.
• Do not cross the signal lines between the XT1 and XT2 pins and the resonator
with other signal lines. Do not route the signal lines near a signal line through
which a high fluctuating current flows.
• Moisture absorption by the circuit board and condensation on the board in a
highly humid environment may cause the impedance between the XT1 and XT2
pins to drop and disable oscillation. When using the circuit board in such an
environment, prevent the circuit board from absorbing moisture by taking
measures such as coating the circuit board.
• Coat the surface of the circuit board by using material that does not generate
capacitance or leakage between the XT1 and XT2 pins.
(2) Clock operation status control register (CSC)
This register is used to control the operations of the high-speed system clock, internal high-speed oscillation clock,
and subsystem clock (except the 20 MHz internal high-speed oscillation clock and internal low-speed oscillation clock).
CSC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to C0H.
Figure 5-3. Format of Clock Operation Status Control Register (CSC)
Address: FFFA1H After reset: C0H R/W
Symbol
<7>
<6>
5
4
3
2
1
<0>
CSC
MSTOP XTSTOP
0
0
0
0
0
HIOSTOP
MSTOP
0
1
High-speed system clock operation control
X1 oscillation mode
External clock input mode
Input port mode
X1 oscillator operating
External clock from EXCLK
−
pin is valid
X1 oscillator stopped
External clock from EXCLK
pin is invalid
XTSTOP
0
1
Subsystem clock operation control
XT1 oscillation mode
Input port mode
XT1 oscillator operating
−
XT1 oscillator stopped
HIOSTOP
0
1
Internal high-speed oscillation clock operation control
Internal high-speed oscillator operating
Internal high-speed oscillator stopped
Caution 1. After reset release, set the clock operation mode control register (CMC) before
starting X1 oscillation as set by MSTOP or XT1 oscillation as set by XTSTOP.
R01UH0004EJ0501 Rev.5.01
211
Jun 20, 2011