UPD78F1502AGK-GAK-AX Datasheet, PDF (407/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 10 12-BIT A/D CONVERTER (μ PD78F150xA),
10-BIT A/D CONVERTER (μ PD78F151xA)
(2) A/D converter mode register (ADM)
This register sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
ADM can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 10-5. Format of A/D Converter Mode Register (ADM)
Address: FFF30H After reset: 00H
Symbol
<7>
6
ADM
ADCS
ADSCM
R/W
5
FR2^{Note 1}
4
FR1^{Note 1}
3
FR0^{Note 1}
2
LV1^{Note 1}
1
LV0^{Note 1}
<0>
ADCE
ADCS
0
1
Stops conversion operation
Enables conversion operation
A/D conversion operation control ^{Notes 2, 3, 4}
ADSCM
0
1
A/D conversion operation mode specification
Continuous conversion mode
Single conversion mode
ADCE
0
1
A/D voltage comparator operation control^{Note 4}
Stops A/D voltage comparator operation
Enables A/D voltage comparator operation
Notes 1.
2.
3.
4.
For details of FR2 to FR0, LV1, LV0, and A/D conversion, see Table 10-2 A/D Conversion Time
Selection.
When using the A/D converter in timer trigger mode, do not set ADCS to 1. (ADCS automatically switches
to 1 when a timer trigger signal is generated.) However, ADCS may be set to 0 to stop A/D conversion.
Read ADCS to determine whether A/D conversion is under execution.
The operation of the A/D voltage comparator is controlled by ADCS and ADCE, and it takes 1 μs from
operation start to operation stabilization. Therefore, when ADCS is set to 1 after 1 μs or more has elapsed
from the time ADCE is set to 1, the conversion result at that time has priority over the first conversion
result. Otherwise, ignore data of the first conversion.
ADCS
0
0
1
1
ADCE
0
1
0
1
Table 10-1. Settings of ADCS and ADCE
A/D Conversion Operation
Stop status (DC power consumption path does not exist)
Conversion waiting mode (A/D voltage comparator operation, only comparator
consumes power)
Setting prohibited
Conversion mode (A/D voltage comparator operation)
R01UH0004EJ0501 Rev.5.01
391
Jun 20, 2011